1. Field
The present invention relates to a semiconductor device, such as an insulated gate field effect transistor, and a manufacturing method thereof.
2. Description of the Related Art
A silicon very large scale integrated circuit is one of the basic technologies supporting a future highly information-oriented society. In order to achieve a high function integrated circuit, it is necessary to obtain high performances of semiconductor devices, such as a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), a CMOSFET (Complementary MOSFET), etc., which are elements of the integrated circuit.
High performances of semiconductor elements have been basically accomplished according to a proportional reduction rule. However, in recent years, high performances resulting from ultrafine elements have been difficult to achieve due to various limitations in physical properties.
For example, for a gate electrode using silicon, there have been pointed out the following problems: elicitation of the gate parasitic resistance with an increase in element operation speed, the reduction of the effective insulating film capacitance due to the carrier depletion at the insulating film interface, variations in threshold voltage due to penetration of added impurities into the channel region, and other problems. In order to solve these problems, metal gate materials have been proposed.
As one of the metal gate electrode forming technologies, there is a fully silicide (FUSI) gate electrode technology by which all the gate electrodes are silicided with Ni or Co.
A metal gate electrode requires different work functions according to the conductivity type in order to implement the device operation at an optimum threshold voltage.
This is because the threshold voltage of a MOS transistor is modulated with a change in the work function (Φeff: effective work function) of the gate electrode at an interface between the gate electrode and gate insulating film.
For example, for the metal gate electrode using nickel silicide (NiSix), the work function decreases with an increase in composition ratio x. Thus, such a metal gate electrode is suitable for an N-channel MOS transistor.
On the other hand, the work function increase with a decrease in composition ratio x. Thus, such a metal gate electrode is suitable for a P-channel MOS transistor.
For this reason, when a CMOS transistor is manufactured, it is necessary to form NiSix having different composition ratios x for the N-channel MOS transistor and the P-channel MOS transistor, respectively.
In addition, conductivity of NiSix differs depending on the composition ratio x. Therefore, the gate resistance increases depending upon the composition ratio x of NiSix used in the gate electrode.
In contrast, JP-A-2005-129551 discloses a semiconductor device prepared in the following manner: using NiSix of the same composition for the N-channel MOS transistor and the P-channel MOS transistor; and adding an N-type impurity to the NiSix of the N-channel MOS transistor, and also adding a P-type impurity to the NiSix of the P-channel MOS transistor.
As a result of this, nickel silicide gate electrodes having different work functions are formed for the N-channel MOS transistor and the P-channel MOS transistor, respectively.
However, the semiconductor device disclosed in JP-A-2005-129551 requires adding the impurity with a high concentration (1E20 atoms/cm2 or more).
In addition, if an insulating film higher in dielectric constant than a silicon oxide film is used for the gate insulating film, even though an impurity is added, an effect of adjusting the work function does not obtained.